| Topology | Other Topology |
| IC revision | E1 |
This “18-bit, 2-Msps Isolated Data Acquisition Reference Design to achieve maximum SNR and sampling rate” illustrates how to overcome performance-limiting challenges typical of isolated data acquisition system design:Maximizing sampling rate by minimizing propagation delay introduced by digital isolatorMaximizing high-frequency AC signal chain performance (SNR) by effectively mitigating ADC sampling clock jitter introduced by the digital isolator