Topology | Positive to Negative Converter |
Input voltage | 600-1000 V |
Output 1 | 400 V / 18 A |
This reference design provides an overview on how to implement a bidirectional three-level, three-phase, SiC-based active front end (AFE) inverter and PFC stage. The design uses a switching frequency of 50kHz and a LCL output filter to reduce the size of the magnetics. A peak efficiency of 99% is achieved.The design shows how to implement a complete three phase AFE control in the DQ domain. The control and software is validated on the actual hardware and onhardware in the loop (HIL) setup.
Order Code | Datasheet | Simulation | |
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![]() | 150060GS75000 | SPEC | |
![]() | 150060RS75000 | SPEC | |
![]() | 885012206095 | SPEC | |
![]() | 885012007057 | SPEC | |
![]() | 61300411021 | SPEC PCN pendingDue to a pending PCN there will be a new datasheet revision issued for this order code soon. Please find the actual as well based on valid PCN date the new revision datasheet below. If you have further questions please get in contact with our sales staff. | – |
![]() | 61301621021 | SPEC PCN pendingDue to a pending PCN there will be a new datasheet revision issued for this order code soon. Please find the actual as well based on valid PCN date the new revision datasheet below. If you have further questions please get in contact with our sales staff. | – |
![]() | 750343805 | SPEC | – |
![]() | 750343804 | SPEC | – |
Samples |
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Order Code | Datasheet | Simulation | Downloads | Status | Product series | λDom typ. (nm) | Emitting Color | λPeak typ. (nm) | IV typ. (mcd) | VF typ. (V) | Chip Technology | 2θ50% typ. (°) | C | Tol. C | VR (V (DC)) | Size | Operating Temperature | Q (%) | DF (%) | RISO | Ceramic Type | L (mm) | W (mm) | Fl (mm) | Pins (pcs) | Rows | H (mm) | Gender | Type | IR (A) | Packaging | Samples |
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