Analog Devices AD7625

Description

The AD7625 is a 16-bit, 6 MSPS, charge redistribution successive approximation register (SAR) based architecture analog-to-digital converter (ADC). SAR architecture allows unmatched perfor-mance both in noise (93 dB SNR) and in linearity (1 LSB). The AD7625 contains a high speed, 16-bit sampling ADC, an internal conversion clock, and an internal buffered reference. On the CNV± rising edge, it samples the voltage difference between the IN+ and IN− pins. The voltages on these pins swing in opposite phase between 0 V and REF. The 4.096 V reference voltage, REF, can be generated internally or applied externally.

All converted results are available on a single LVDS self-clocked or echoed-clock serial interface, reducing external hardware connections.

The AD7625 is housed in a 32-lead, 5 mm × 5 mm LFCSP with operation specified from −40°C to +85°C.

Features

• Throughput: 6 MSPSSNR: 93 dB
• INL: ±0.45 LSB typical, ±1 LSB maximum
• DNL: ±0.3 LSB typical, ±0.5 LSB maximum
• Power dissipation: 135 mW32-lead LFCSP (5 mm × 5 mm)
• SAR architectureNo latency/no pipeline delay
• 16-bit resolution with no missing codes
• Zero error: ±1.5 LSB
• Differential input voltage: ±4.096 V
• Serial LVDS interface
• Self-clocked mode
• Echoed-clock mode
• Can use LVDS or CMOS for
• conversion control (CNV signal)
• Reference options
• Internal: 4.096 VExternal (1.2 V) buffered to 4.096 V
• External: 4.096 V

Remarks:Ferrite Bead Inductor Used at The supply pinRefer page no.15

Typical applications

• Receivers
• Test equipment
• High dynamic range telecommunications
• Digital imaging systems
• High speed data acquisition
• Spectrum analysis

More information

• Datasheet
• IC product information