| Topologie | Sonstige Topologie |
| Eingangsspannung | 1.65-5.5 V |
| IC-Revision | A03 |
The SN74LVC2G125 device is a dual bus buffergate, designed for 1.65-V to 5.5-V VCC operation.This device features dual line drivers with 3-stateoutputs. The outputs are disabled when theassociated output-enable (OE) input is high.NanoFree™ package technology is a majorbreakthrough in IC packaging concepts, using the dieas the package.To ensure the high-impedance state during power upor power down, OE should be tied to VCC through apullup resistor; the minimum value of the resistor isdetermined by the current-sinking capability of thedriver.This device is fully specified for partial-power-downapplications using Ioff. The Ioff circuitry disables theoutputs, preventing damaging current backflowthrough the device when it is powered down.
2 V at VCC = 3.3 V, TA = 25°C
Artikel Nr. | Datenblatt | Simulation | Downloads | Status | Produktserie | Z @ 100 MHz(Ω) | Zmax(Ω) | Testbedingung Zmax | IR 2(mA) | RDC max.(Ω) | Typ | Muster | |
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![]() | WE-CBF SMT-Ferrit, 1000 Ω, 1200 Ω | Status Aktivi| Produktion ist aktiv. Erwartete Lebenszeit: >10 Jahre. | ProduktserieWE-CBF SMT-Ferrit | Impedanz @ 100 MHz1000 Ω | Maximale Impedanz1200 Ω | Maximale Impedanz200 MHz | Nennstrom 2550 mA | Gleichstromwiderstand1.5 Ω | TypBreitband |