Intel 5ASTFD5K3F40I3

Description

The Arria V SoC development board provides a hardware platform for developing and prototyping low-power, high-performance, and logic-intensive designs using Altera’s Arria V SoC. The board provides a wide range of peripherals and memory interfaces to facilitate the development of Arria V SoC designs.

Features

• One Arria V SoC (5ASTFD5K3F40I3) in a 1517-pin FBGA package
• FPGA configuration circuitry
• Active Serial (AS) x1 or x4 configuration (EPCQ256SI16N)
• MAX® V CPLD (5M2210ZF256) in a 256-pin FBGA package as the SystemController
• Flash fast passive parallel (FPP) configuration
• MAX II CPLD (EPM570GF100) as part of the on-board USB-BlasterTM II for usewith the Quartus® II Programmer
• Clocking circuitry
• Si570, Si571, and Si5338 programmable oscillators
• 50-MHz, 66-MHz, 100-MHz, 125-MHz programmable oscillators
• SMA input (LVCMOS)
• Memory
• One 1,024-Mbyte (MB) HPS DDR3 SDRAM with error correction code (ECC)support
• Two 1,024-MB FPGA DDR3 SDRAM
• One 512-Megabit (Mb) quad serial peripheral interface (QSPI) flash
• One 512-Mb CFI synchronous flash
• One 256-Mb NOR flash (EPCQ device)
• One 32-Kilobit (Kb) I2C serial electrically erasable PROM (EEPROM)
• One Micro SD flash memory card
• Communication Ports
• One PCI Express x4 Gen1/Gen2 socket
• Two FPGA mezzanine card (FMC) ports
• One USB 2.0 on-the-go (OTG) port
• One Gigabit Ethernet port
• Two 10/100 Ethernet ports
• Two SFP+ ports
• Two RS-232 UART (through the mini-USB port)
• One real-time clock
• General user input/output
• LEDs and displays
• Eight user LEDs
• One configuration load LED
• One configuration done LED
• One error LED
• Three configuration select LEDs
• Four on-board USB-Blaster II status LEDs
• Two FMC interface LEDs
• Two UART data transmit and receive LEDs
• One power on LED
• One two-line character LCD display
• Push buttons
• One CPU reset push button
• One MAX V reset push button
• One program select push button
• One program configuration push button
• Eight general user push buttons
• DIP switches
• One JTAG chain control DIP switch
• One board settings DIP switch
• One FPGA configuration mode DIP switch
• One general user DIP switch
• Power supply
• 14–20-V (laptop) DC input
• Mechanical
• 7.175" × 9" rectangular form factor

More information

• Datasheet
• IC product information