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Overview
| Topology | Buck Converter |
| Output 1 | 4.2 V |
| IC revision | 2 |
Description
This AN is intended to guide the customer in the selection of the external passive components for the BUCK and LDO regulators of STPMIC25 device.
Features
Input voltage range from 2.8 V to 5.5 V7 buck SMPS converters with adaptive constant on-time (COT) topology6 adjustable general purpose LDOs1 LDO for DDR3L/DDR4 termination (sink-source), bypass mode for lpDDR or as a general purpose LDO1 LDO for USB PHY supply with automatic power source detection1 reference voltage VREFDDR LDO for DDR memory2 MHz switching frequency buck converters with forced PWM and spread spectrum functionUser programmable non-volatile memory (NVM), enabling scalability to support a wide range of applicationsImmediate output alternate settings toggle by dedicated power control pinsProgrammable output voltages turn ON/OFF sequencesI²C and digital I/O control interfacesWFQFN 56L (6.5 x 6.5 x 0.9 mm)