Microchip MSC080SMA120 | Demoboard EV07H18A

Description

The PSMT Half‑Bridge Reference Design is a high‑voltage, high‑power reference design developed to optimize the switching, thermal and control performance of 1200V mSiC® MOSFETs in a surface‑mount, top‑side‑cooled PSMT package. The board implements a compact half‑bridge topology with two mSiC MOSFETs paralleled per switch position, enabling reduced effective on‑resistance, improved current sharing and increased thermal headroom.An integrated, isolated gate‑driver subsystem with protection features—including UVLO, DESAT detection with soft shutdown and active Miller clamping—supports repeatable, high‑performance operation at elevated bus voltages and fast dv/dt. The design exposes DC‑bus and phase terminals for direct integration into common switch‑mode power conversion topologies and is optimized for laboratory evaluation of layout, thermal interfaces and high‑frequency switching behavior.

Features

Half bridge topology with four 1200 V, 80 mΩ SiC MOSFETs (two in parallel per switch)High voltage DC bus operation up to 960 V maximumIntegrated isolated gate drivers with:Desaturation (DESAT) fault detection and soft shutdownUndervoltage lockout (UVLO)Active Miller clampingPositive and negative gate drive rails per channelSelectable 3.3 V or 5 V logic level control domainAdjustable internal deadtime via RC networksDedicated DC+, DC− and PHASE terminals with test pointsDesigned for top side heatsinking with forced air cooling support

Typical applications

• Evaluation of SiC MOSFET paralleling techniques, High‑voltage DC‑DC converters (e.g., synchronous buck), Two‑level inverter or bridge‑leg development, High‑power power‑supply prototyping, Industrial and energy‑conversion research platforms

More information

• Datasheet
• IC product information