Intel Cyclone IV GX

Description

The Cyclone IV GX transceiver starter board provides a hardware platform for developing and prototyping low-power, high-volume, feature-rich designs as well as to demonstrate the Cyclone IV GX device's on-chip memory, embedded multipliers, and the Nios® II embedded soft processor. The board provides peripherals and memory interfaces to facilitate the development of the Cyclone IV GX transceiver designs.

The Cyclone IV GX transceiver starter board is especially suitable for cost-sensitive applications that require high-speed transceivers and power integrity solutions.

Features

• Cyclone IV GX EP4CGX15BF14 FPGA in the 169-pin FineLine BGA (FBGA)package
• 14,400 LEs
• 540-kilobit (Kb) on-die memory
• 20 global clocks
• 72 user I/Os
• 3 phase locked loops (PLLs)
• 1 PCI Express hard IP block
• 1.2-V core power
• MAX® II EPM2210F256 CPLD in the 256-pin FBGA package
• 2.5-V core power
• MAX II EPM240M100 CPLD in the 100-pin Micro FBGA (MBGA) package
• FPGA configuration circuitry
• MAX II CPLD EPM2210 System Controller and flash passive serial (PS) configuration
• On-board USB-BlasterTM for use with the Quartus® II Programmer
• JTAG header for external USB-Blaster with the Quartus II Programmer
• Erasable programmable configurable serial (EPCS) device
• On-Board ports
• USB 2.0
• One gigabit Ethernet port
• Transceiver interfaces
• PCI Express x1 edge connector
• 10/100/1000BASE-T Ethernet PHY with RJ-45 connector
• One optional TX/RX transceiver to SMA connectors (requires a minor
• modification on the board)
• On-Board memory
• 18-megabit (Mb) Synchronous Static Random Access Memory (SSRAM)
• 128-Mb flash
• On-Board clocking circuitry
• 6-MHz, 24-MHz, 25-MHz, and 50-MHz oscillators
• 125-MHz LVDS oscillator
• SMA clock input
• General user I/O
• LEDs and display
• Four FPGA user LEDs
• One configuration done LED
• One max error LED
• Five Ethernet status LEDs
• One USB status LED
• One power status LED
• Two PGM LEDs
• A two-line character LCD display
• Push-Button switches
• One CPU reset push-button switch
• One MAX II configuration reset push-button switch
• One PGM configure push-button switch (configure the FPGA from flash memory)
• One PGM select push-button switch (select image to load from flash memory)
• Two general user push-button switches
• DIP switches
• Board setting DIP switch
• Configuration setting DIP switch
• Power supply
• 9-V – 16-V DC input
• 2.5-mm barrel jack for DC power input
• On/Off slide power switch
• On-Board power measurement circuitry
• Mechanical
• 6.6” x 2.713” board
• PCI Express chassis or bench-top operation

More information

• Datasheet
• IC product information