| Topologie | FPGA |
| IC-Revision | A |
This reference design uses the UCD3138064A as a digital controller to control inverting buck-boost with the capability of supporting two-phase peak current mode control. The soft-switching technology is used in this design to improve the power efficiency. The input voltage range is -62 V to -36 V. The output voltage range is adjustable from 28 V to 52 V. The default output voltage is 48-V with a maximum current of 14 A.
| Artikel Nr. | Datenblatt | Downloads | Status | Produktserie | Pins (pcs) | Raster (mm) | Reihen | Gender | Typ | IR (A) | Verpackung | Muster | |
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![]() | 61300111121 | SPEC | 7 Dateien | Aktiv i| Produktion ist aktiv. Erwartete Lebenszeit: >10 Jahre. | WR-PHD Pin Header - Single | 1 | 2.54 | Single | Stiftleiste | Gerade | 3 | Beutel |
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| Artikel Nr. | Datenblatt | Downloads | Status | Produktserie | Pins (pcs) | Raster (mm) | Reihen | Gender | Typ | IR (A) | Verpackung | Muster |
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