STMicroelectronics PM6670S

Beschreibung

The device PM6670S is a complete DDR2/3 power supply regulator designed to meet JEDEC specifications.It integrates a constant on-time (COT) buck controller, a 2 Apk sink/source low drop out regulator and a 15 mA low noise buffered reference.The COT architecture assures fast transient response supporting both electrolytic and ceramic output capacitors. An embedded integratorcontrol loop compensates the DC voltage error due to the output ripple.The 2 Apk sink/source linear regulator provides the memory termination voltage with fast load transient response.The device is fully compliant with system sleep states S3 and S4/S5, providing LDO output high impedance in suspend-to-RAM and trackingdischarge of all outputs in suspend-to-disk.

Eigenschaften

• Switching section (VDDQ)
• 4.5 V to 28 V input voltage range
• 0.9 V, ±1 % voltage reference
• 1.8 V (DDR2) or 1.5 V (DDR3) fixed output voltages
• 0.9 V to 2.6 V adjustable output voltage
• 1.237 V ±1 % reference voltage available
• Very fast load transient response using constant on-time control loop
• No RSENSE current sensing using low side MOSFET’s RDS(ON)
• Negative current limit
• Latched OVP and UVP
• Soft-start internally fixed at 3 ms
• Selectable pulse skipping at light load
• Selectable no-audible (33 kHz) pulse skip -mode
• Ceramic output capacitors supported
• Output voltage ripple compensation
• VTT LDO and VTTREF
• 2 Apk LDO with foldback for VTT
• Remote VTT sensing
• High-Z VTT output in S3
• Ceramic output capacitors supported
• ±15 mA low noise buffered referenceREMARKS:-REFERTable 13Evaluted inductorspage no42

Typische Anwendungen

• SSTL18, SSTL15 and HSTL bus termination
• Notebook computers
• Handheld and PDAs
• CPU and chipset I/O supplies
• DDR2/3 memory supply

Weiterführende Informationen

• Datenblatt
• Produktseite des IC-Herstellers