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Intel STRATIX V | Demoboard Stratix V FPGA

Stratix V

Details

TopologieSonstige Topologie
IC-Revision3.5

Beschreibung

Altera’s 28-nm Stratix® V FPGAs include innovations such as an enhanced core architecture, integrated transceivers up to 28.05 gigabits per second (Gbps), and a unique array of integrated hard intellectual property (IP) blocks.With these innovations, Stratix V FPGAs deliver a new class of application-targeted devices optimized for: •Bandwidth-centric applications and protocols, including PCI Express® (PCIe®) Gen3 •Data-intensive applications for 40G/100G and beyond •High-performance, high-precision digital signal processing (DSP) applications Stratix V devices are available in four variants (GT, GX, GS, and E), each targeted for a different set of applications. For higher volume production, you can prototype with Stratix V FPGAs and use the low-risk, low-cost path to HardCopy® V ASICs

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Artikeldaten

Artikel Nr.
Daten­blatt
Simu­lation
Downloads
Status
Produktserie
L(µH)
IR(A)
ISAT(A)
fres(MHz)
Montageart
Muster
WE-TPC SMT-Speicherdrossel, 2.6 µH, 3 A
Simu­lation
Status Aktivi| Produktion ist aktiv. Erwartete Lebenszeit: >10 Jahre.
Induktivität2.6 µH
Nennstrom3 A
Sättigungsstrom2.7 A
Eigenresonanzfrequenz55 MHz
MontageartSMT