As previously discussed – in the blog post "GaN – The Next Big Thing" – wide bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) will play a key role in shaping the power electronics industry of the future. What are the most important design considerations for developers to know when using these state-of-the-art devices?

In power converters, important parameters to optimize are efficiency, power density and reliability of the application. Power semiconductors of silicon carbide (SiC) and gallium nitride (GaN) technology are gaining ever-increasing popularity because of their ability to significantly increase the efficiency and power density of power electronics applications. However, the particular considerations related to their very fast switching capability and associated control requirements present some challenges to the designer. Here we provide a short overview of the main differences between WBG semiconductors and their conventional silicon-based counterparts, as well as important considerations when designing power converters with these devices.

The Advantages

The main advantage of SiC and GaN transistors is that they can switch much faster (over 10 times), and have a much lower conduction resistance (Rds(on)) compared to silicon devices with the same rated voltage. They also do not have a parasitic body diode like Silicon devices do, so the switching reverse recovery losses disappear. All of this translates to lower power loss and higher efficiency. These superior characteristics also open up the possibility of new converter topologies, as well as operating at higher switching frequencies with smaller overall solution size and lower system cost. In typical applications, such as DC-DC converters, inverters and class D amplifiers, an efficiency increase of 3 to 5 percent, along with a 20 to 35 percent reduction in size and associated cost savings of 20 to 30 percent are not rare. These applications are used in many industry areas, like renewable energy, smart grids, electric vehicles (e-mobility) and industrial.

Gate control of GaN and SiC devices

There are differences in the control of SiC and GaN transistors. GaN-FETs are "lateral" devices and therefore require a relatively low driving voltage of 5 to 6 V. Some GaN devices use a cascode combination consisting of a field effect transistor with GaN junction (JFET) and a silicon FET. Their control technique is similar to the control of silicon FETs. Due to the special structure of the GaN FET, a so-called two-dimensional electron gas (2DEG) is formed in it, which does not restrict the electron mobility in the lateral layer in which the main current (drain -> source) takes place, thus making the device applicable up to very high frequencies in the GHz range. The resistivity of the GaN transistor is also very low, typically in the two-digit m-range.

SiC-FETs require typically +15 to +20 V to switch on and a negative gate-source voltage of up to -5 V to switch off. The negative voltage helps to prevent spurious turn-on of the device due to parasitic ringing and to the high di/dt generated during the fast switching transition of the complementary device in a half-bridge configuration, which is known as Miller effect. SiC MOSFETs also require very steeply rising and falling drive pulses of typically 1 to 3 ns to switch on and off fast. This fast switching is possible due to the extremely low parasitic capacitances of the device.

Preventing ringing and EMI issues

The PCB layout of SiC MOSFETs, and especially of GaN FETs, can be very challenging. A typical Si superjunction FET requires a gate charge of 120 to 150 nC for switching, while a SiC FET requires only 30 nC. This not only means a significant reduction in driving power for GaN and SiC transistors, but also that the devices have a tendency to suffer from gate-source ringing due to the very fast dv/dt and di/dt generated during the fast switching transition. Despite the much lower gate capacitance, the parasitic inductance of the gate current loop now needs to be minimized or high-frequency ringing may appear, adversely affecting EMC and efficiency of the converter. A very careful PCB layout is therefore critical. The loop formed by the supply capacitors, driver IC and SiC/GaN device gate-source terminals should be kept as small as possible and with short traces. A small return path plane is also recommended. Alternatively, switching speed could be reduced by means of ferrite beads or increasing the gate resistance. As a result, the gate drive signal should show minimal overshoot/undershoot and ringing. The gate signal must also feature very short rise and fall times in relation to the frequency. If these points are considered, circuits with high efficiency can be implemented with this semiconductor technology. As a result, a typical du/dt of > 80 V/ns must be expected for SiC switching stages. And for GaN even above 150 V/ns!

Würth Elektronik can support customers designing with SiC and GaN technologies. Circuit design and layout must also consider signal integrity and EMC. Würth Elektronik advises on these issues and offers the components best suited for this technology, for example:

WE-MPSB EMI Multilayer Power Suppression Bead

• For damping ringing and reducing overshoots and undershoots in the gate control
• In the power supply line for damping switching harmonics

WCAP-PTHR Aluminium-Polymer-Capacitors

• Effective blockage of supply

WCAP-CSMH MLCCs

• Buffering of the operating voltage directly at drain and source connections (tank)

WE-AGDT

• Dual output transformers for generating supply voltage to drive gate drivers for SiC MOSFETs
• Provides Bipolar Output voltage rails (+15 V/-4 V) as well as unipolar (15-20 V) to optimally drive different SiC-MOSFET devices.
• Very small interwinding capacitance down to 6.8 pF, making the system more robust against noise caused by high dv/dt of SiC-MOSFET devices
• Provides over 6 W output power in Flyback topology with LT8302, allowing high switching frequency and paralleling of SiC-MOSFET devices.