Altium

Design Rule Verification Report

Date: 4/3/2023
Time: 4:53:44 PM
Elapsed Time: 00:00:01
Filename: \\Mac\Home\Desktop\MyCloudDrive\My jobs\HE\1GB_USB Adapter with PoE\V1.3\1GB-USB_Adapter_POE_ V13.PcbDoc
Warnings: 0
Rule Violations: 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=0.254mm) (InNet('SHIELD')),(All) 0
Clearance Constraint (Gap=0.127mm) (All),(All) 0
Clearance Constraint (Gap=0.381mm) (OnLayer('Keep-Out Layer')),(All) 0
Clearance Constraint (Gap=0.483mm) (InNet('SHIELD')),(InNet('GND')) 0
Clearance Constraint (Gap=0.203mm) (InNet('AGND')),(All) 0
Clearance Constraint (Gap=1.524mm) (InPadClass('PAIR')),(InNet('GND')) 0
Clearance Constraint (Gap=0.127mm) (InPadClass('USB-C')),(All) 0
Clearance Constraint (Gap=0.127mm) (InNet('USB3RX1_N')),(InNet('SHIELD')) 0
Clearance Constraint (Gap=0.178mm) (InNet('GND')),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=0.127mm) (Max=2.54mm) (Preferred=0.254mm) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.381mm) (Air Gap=0.203mm) (Entries=4) (All) 0
Hole Size Constraint (Min=0.025mm) (Max=5mm) (All) 0
Hole To Hole Clearance (Gap=0.254mm) (All),(All) 0
Minimum Solder Mask Sliver (Gap=0.254mm) (Disabled)(All),(All) 0
Silk To Solder Mask (Clearance=0.254mm) (Disabled)(IsPad),(All) 0
Silk to Silk (Clearance=0.254mm) (Disabled)(All),(All) 0
Net Antennae (Tolerance=0mm) (All) 0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) 0
Total 0